Input transducers: LDR and thermistor
An input transducer turns a physical quantity into an electrical change. The two are the LDR, whose resistance FALLS as the light brightens, and the NTC thermistor, whose resistance FALLS as it gets hotter. A changing resistance does nothing by itself, so each forms one arm of a potential divider, turning the change into a changing VOLTAGE that feeds a comparator or logic gate to switch an output.
Logic gates and truth tables
A logic gate gives an output of logic 1 or 0 set by a fixed truth table. The five: NOT (inverts its input), AND (1 only when ALL inputs are 1), OR (1 when ANY input is 1), NAND (AND inverted — 0 only when all are 1) and NOR (OR inverted — 1 only when all are 0). They come as 4000-series CMOS ICs. NAND and NOR are universal: tie both inputs together for a NOT; cascade gates to get more inputs. Work a truth table one combination at a time.
555 timer: monostable, astable and the PIC
The 555 timer IC makes a time delay. In monostable mode it gives ONE fixed-length pulse when triggered, then rests: pulse time from the GIVEN formula (R in ohms, C in farads). In astable mode it free-runs as a continuous square wave, no trigger: period , frequency . A PIC does the same in software, so one chip gives many easily changed timings.
Drawn from real examiner reports.
Capacitor and time prefixes muddled
The 555 formulae give the right time only if values are in base units: ohms and FARADS. A 100 microfarad capacitor is 0.0001 F, not 100. Candidates leave capacitance in microfarads or confuse prefixes, so the answer is a thousand or a million times out. Convert to farads and ohms first, then substitute. A result of 1 100 000 s where 1.1 s is sensible shows a dropped prefix.
Candidates confused the prefixes pF/nF/microfarad and mega with milli, did not recognise the micro symbol, and misread a time axis in milliseconds (s23 P42 Q9, Q12a(iii); w23 P42/P43 Q7b).
Building a gate from other gates
Making a required function from the gates available causes two problems. First, a 3-input gate from 2-input gates: feed the first gate's output into an input of the second (a 3-input OR is two 2-input ORs cascaded). Second, a NOT from a universal NAND or NOR: join the two inputs, so 1 gives 0 out. Check each build with a truth table.
Building a 3-input OR from two 2-input gates (s23 P42 Q12c; s22 Q12), and a NOT gate from a universal NAND or NOR (w22 Q12a), are repeatedly under-answered.
Divider voltage treated as clean logic
The topic definition trap. A transducer potential divider gives an ANALOGUE voltage that changes smoothly with light or temperature, but a logic gate recognises only a clear 0 or 1. As it drifts through the middle it sits between the thresholds, neither 0 nor 1, so the output flickers. An op-amp comparator fixes it, snapping the output clean against a reference.
A fluctuating potential-divider output can fall between the logic thresholds, so it is not a stable/usable logic signal and a conditioning circuit is needed; very few grasped this (s22 P42 Q12).
Astable mistaken for needing a trigger
A monostable has one stable state and gives a SINGLE timed pulse only when triggered, then rests. An astable has NO stable state: it free-runs, giving a CONTINUOUS square wave the moment it is powered, no trigger. So an astable flashes an LED or a buzzer, while a monostable gives a one-shot delay after a press. Confusing them adds a trigger the astable does not need.
Forgetting to double R2 in the bracket
The astable formulae use , not : R2 counts twice because the capacitor charges through R1 and R2 but discharges through R2 alone. Adding the resistors once gives a wrong period and frequency. With R1 = R2 = 1000 ohm the bracket is 1000 + 2 times 1000 = 3000 ohm, not 2000. Work the bracket out first, doubling R2, then multiply by C in farads.
NAND/NOR read as AND/OR (no invert)
NAND and NOR are the AND and OR results INVERTED, but candidates give the plain value and forget the bar. A NAND output is 0 only when all inputs are 1, and 1 otherwise. A NOR output is 1 only when all inputs are 0, and 0 otherwise. So NAND(1,1) = 0 but NAND(1,0) = 1; NOR(0,0) = 1 but NOR(0,1) = 0. Work out the AND or OR value first, then invert every entry.
The NAND truth table is a repeated identification task (s22 P42).
Resistance rises with more light or heat
A testable error: assuming resistance rises with the stimulus. For the common NTC thermistor the opposite is true — resistance FALLS as temperature RISES; for the LDR, resistance FALLS as the light BRIGHTENS. So when bright or hot these are LOW resistance; when dark or cold, HIGH. Get the direction wrong and the LDR goes in the wrong divider arm.
Build the truth table row by row
Never answer a logic question from memory. Draw the truth table and fill it one input combination at a time; for a combined circuit write each intermediate gate output in its own column before the final output. That makes a cascade build or a universal NOT obvious.
555 timing: convert units, then substitute
Work every 555 timing question in order: convert to base units — ohms and farads (100 microfarad is 0.0001 F) — write the given formula, substitute, then state the answer with its unit. Showing the conversion and substitution banks the method marks.
Condition a sensor signal with a comparator
When a sensing circuit feeds a logic system, add a conditioning stage: an op-amp comparator compares the divider voltage with a fixed reference and snaps the output to a clean logic 0 or 1. If asked, correctly label the op-amp inverting/non-inverting inputs and unused pins.
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